Vhdl language - KAIE9M16

Goal(s)

This course introduces the hardware description language VHDL and the field-programmable gate arrays circuits (FPGA). It offers different tools to learn the multiple design possibilities provided by VHDL, as well as the principles of design and FPGA synthesis.

Following this course, students will be able to:

• Model electronic systems with VHDL
• Design synchronous circuits as finite-state machines
• Understand FPGA architecture
• Understand the synthesis and essential constructs used in FPGA design
• Verify theory with practical examples (simulation)
• Design a digital circuit that implements a simple algorithm using the hardware/software partitioning approach

Content(s)

1. Modeling and simulation of electronic systems
2. Principles of VHDL language
3. Model structure and data types
4. Data flow and structural VHDL description levels
5. Concurrent and sequential instructions
6. Sequential and combinatorial logic circuits
7. Advanced aspects: packaging, subroutines, generics and generate statements, conversion functions
8. Introduction to FPGA: architecture, design flow, development boards, synthesis and place/root tools

• Basic knowledge of digital electronic systems
• Programming basics
• Basic knowledge of Boolean algebra
• Notions of combinatorial and sequential circuits