Processor & dsp - KAEL9M05

  • Number of hours

    • Lectures 20.0
    • Projects -
    • Tutorials 12.0
    • Internship -
    • Laboratory works 4.0
    • Written tests 4.0

    ECTS

    ECTS 0.4

Goal(s)

  • Understand the link between the architecture and the instruction set
  • Application to RISC processors
  • Being comfortable with low level programming and embedded system architecture

Content(s)

  1. Integer and real number coding: fixed and floating point
  2. Differences between CISC and RISC processor architecture
  3. RISC-V processor instruction set
  4. C language towards assembly language
  5. Efficient register management
  6. Function calls
  7. Architecture: datapath and control
  8. Pipeline architecture
  9. Memory architecture
  10. Synchronization of multicores
  11. Introduction to OpenMP

Prerequisites

  • Basics in microprocessor, assembly and C languages
  • Digital electronics

Test

100 % final exams:

  • 50 % 1st written exam
  • 50 % 2nd written exam

Final exams conditions:

  • 2 final written exams – 2h
  • none documents
  • PC, laptop, calculator, mobile phone, telephone and smartwatch forbidden
  • Third time: adapted subject

Calendar

The course exists in the following branches:

  • Curriculum - E2I - Semester 9

Additional Information

Course ID : KAEL9M05
Course language(s): FR

You can find this course among all other courses.

Bibliography

  • Patterson & Hennessy: Computer Organization & Design the hardware/software interface, 2nd edition, Morgan Kaufmann (en anglais)
  • Patterson & Hennessy: Computer Architecture, A quantitative approach, 6th edition, , Morgan Kaufmann (en anglais)