Processor architecture - KAIE9M05

  • Number of hours

    • Lectures 14.0
    • Projects -
    • Tutorials 6.0
    • Internship -
    • Laboratory works 2.0
    • Written tests 2.0

    ECTS

    ECTS 0.25

Goal(s)

Understanding modern micro and multiprocessor architectures and systems, memory hierarchy, and performances.

Content(s)

Chapter 1: Introduction
Chapter 2: Instruction Set Architecture: the programmer's view
Chapter 3: Design of a simple processor: data path part, control part
Chapter 4: Multi-cycle control part of a simple processor
Chapter 5: Pipeline processor
Chapter 6: Performance of computer architectures
Chapter 7: Memory Hierarchy
Chapter 8: Multiprocessors
Chapter 9: Synchronization and cache consistency
Chapter 10: Introduction to OpenMP

Prerequisites

C and assembly languages
Basics on Microprocessor

Test

2 written exams (2h each - no document)

Calendar

The course exists in the following branches:

  • Curriculum - IESE - Semester 9

Additional Information

Course ID : KAIE9M05
Course language(s): FR

You can find this course among all other courses.

Bibliography

Computer Organization and Design: The Hardware/Software Interface, Patterson and Hennessy (il existe une traduction en français, chez Dunod)
Computer Architecture: a Quantitative Approach , Patterson and Hennessy, Quatrième Edition
Notes de cours de Berkeley, MIT, etc...
Traduction de transparents de Bob Brodersen et Randy Katz
•Articles de revues et de conférences
•White papers